Technical Program

Download the Program booklet (pdf) 

April, 22nd

Morning Tutorial – Machine Learning and Its Applications in Test

Room: Presidio Ballroom
Time: 08:30 – 12:00
Presenter: Yu Huang and Gaurav Veda, Mentor, A Siemens Business

Afternoon Tutorial – Learning Techniques for Reliability Monitoring, Mitigation and Adaptation

Room: Presidio Ballroom
Time: 13:00 – 16:30
Presenter: Mehdi Tahoori, Karlsruhe Institute of Technology

April, 23rd

Registration & Breakfast

Room: North Point Lounge
Time: 07:30 – 08:30

Plenary Session

Room: Presidio Ballroom
Time: 08:30 – 10:30
Keynotes:

  • Opening Keynote: Philip Gadd
    Intel, Vice President of Date Center Group and General Manager of Silicon Photonics Product Division
    High volume manufacturing and test of high-speed silicon photonics devices for next generation data center deployments.
  • Invited Keynote: Sudhakar Reddy
    University of Iowa Foundation Distinguished Professor
    Test Drivers – Past, Present, and Future

1A – Analog Test

Room: Banquet ABC
Time: 11:00 – 12:00
Moderator: Steve SunterMentor (Mentor, A Siemens Business)
  • Group Delay Measurement of Frequency Down-Converter Devices Using Chirped RF Modulated Signal
    Pete SARSON (ams AG), Yanagida TOMONORI, Kosuke MACHIDA (Gunma University)
  • A Coherent Subsampling Test System Arrangement Suitable for Phase Domain Measurements
    Young Gouk CHO (Ciena), Gordon ROBERTS (McGill University), Sadok AOUINI, Mahdi PARVIZI, Naim BEN-HAMIDA (Ciena)
  • An Oscillation-Based Test technique for on-chip testing of mm-wave phase shifters
    Marc MARGALEF-ROVIRA, Manuel BARRAGAN, Philippe FERRARI (TIMA Laboratory), E. Sharma, Emmanuel PISTONO, S. Bourdel (IMEP-LaCH)

1B – Hot Topic: Recent Developments in Hardware Security

Room: CA Thayer
Time: 11:00 – 12:00
Organizer: Jeyavijayan Rajendran (Texas A&M University)
Moderator: Jeyavijayan Rajendran (Texas A&M University)
  • A path toward early adoption of lattice-based cryptography schemes in hardware
    Presenter: Ro Commarota, Qualcomm Inc.
  • Device Aging and Power Analysis Attacks
    Presenter: Naghmeh Karimi, University of Maryland Baltimore County
  • Backdoored Neural Networks (BadNets): A New Challenge for the Test Community
    Presenter: Siddharth Garg, New York University

1C – IP Session: Memory Test Practice

Room: Presidio Ballroom
Time: 11:00 – 12:00
Organizer: Ramesh Tekumalla (Broadcom Inc.)
Moderator: Ramesh Tekumalla (Broadcom Inc.)
Speakers:

  • Leveraging Embedded Memory Test and Repair for Functional Safety
    M. Casarsa, Gurgen Harutyunyan, ST Microelectronics, Synopsys
  • Memory Test Capabilities for Addressing Test Cost Reduction and Functional Safety Needs
    Kaitlyn Chen and Ramesh Sharma, Giri Pondichetty and Martin Keim, Intel Corporation, Mentor Graphics
  • Improving Array BIST for Infield Test and Repair and Yield Analysis
    Sreejit Chakravarty, Intel Corporation

Lunch break

Room: North Point Lounge
Time: 12:30 – 13:30

2A – Hardware Security

Room: Banquet ABC
Time: 13:30 – 14:30
Moderator: Adit Singh (Auburn University)
  • ATPG-Based Cost-Effective, Secure Logic Locking
    Abhrajit SENGUPTA (New York University), Mohammed NABEEL (New York University Abu Dhabi), Muhammad YASIN (New York University), Ozgur SINANOGLU (New York University Abu Dhabi)
  • Modeling and Test Generation for Combinational Hardware Trojans
    Ziqi ZHOU, Ujjwal GUIN, Vishwani AGRAWAL (Auburn University)
  • Modeling Attacks on Strong Physical Unclonable Functions Strengthened by Random Number and Weak PUF
    Jing YE (State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences), Qingli GUO (Institute of Computing Technology, Chinese Academy of Sciences), Yu HU (State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences), HUAWEI LI (Chinese Academy of Sciences), Xiaowei LI (Institute of Computing Technology, CAS)

2B – Hot Topic: Approximate Computing

Room: CA Thayer
Time: 13:30 – 14:30
Organizers: Alberto Bosio (LIRMM) & Stefano Di Carlo (Politecnico di Torino)
Moderators: Alberto Bosio (LIRMM) & Stefano Di Carlo (Politecnico di Torino)
  • Formal verification techniques for search-based functional approximation of digital circuits
    Presenter: Lukas Sekanina and Zdenek Vasicek, FIT
  • Testing Approximate Digital Circuits
    Presenter: Alberto Bosio and Marcello Traiola, LIRMM
  • Benefits and Challenges of Approximate Computing in Applications Reliability
    Presenter: Paolo Rech, Daniel Oliveria and Fernando Fernandes, UFRGS

2C – IP Session: Quality Levels of A/MS Devices

Room: Presidio Ballroom
Time: 13:30 – 14:30
Organizer: Peter Sarson (Dialog Semiconductor)
Moderator: Peter Sarson (Dialog Semiconductor)
Speakers:

  • Producing defect-free IC’s by combining electrical test data and silicon Inspection data
    Wim Dobbelaere, OnSemiconductor
  • Using fault injection to determine ASIL level
    Massimo Violante, Politecnico di Torino
  • IEEE P2427: Proposing the essential framework for measuring defect coverage in analog circuits
    Jeff Rearick, AMD

3A – Memory

Room: Banquet ABC
Time: 15:00 – 16:00
Moderator: Martin Keim (Mentor, A Siemens Business)
  • Hardware Trojan Attacks in Embedded Memory
    Tamzidul HOQUE (University of Florida), Xinmu WANG, Abhishek BASAK (Case Western Reserve University), Robert KARAM, Swarup BHUNIA (University of Florida)
  • High efficient low cost EEPROM screening method in combination with an area optimized byte replacement strategy which enables high reliability EEPROMs
    Gregor SCHATZBERGER, Friedrich LEISENBERGER, Pete SARSON, Andreas WIESNER (ams AG)
  • Test Challenges and Solutions for Emerging Non-Volatile Memories
    Mohammad Nasim Imtiaz KHAN, Swaroop GHOSH (Pennsylvania State University)

3B – Hot Topic: Neuromorphic Computing

Room: CA Thayer
Time: 15:00 – 16:00
Organizer: Yiran Chen (Duke University)
Moderator: Yiran Chen (Duke University)
  • Reliability Effects of Resistive Synaptic Devices on Neuromorphic Computing System Performance
    Presenter: Shimeng Yu, Arizona State University
  • Reliability Analysis and Enhancement of the ReRAM based Neuromorphic Systems
    Presenter: Chenchen Liu, Clarkson University
  • Exploiting Deep Learning System-level Vulnerabilities from the Intelligent Supply Chain
    Presenter: Wujie Wen, Florida International University

3C – IP Session: ISO26262 EDA

Room: Presidio Ballroom
Time: 15:00 – 16:00
Organizer: Peter Sarson (Dialog Semiconductor)
Moderator: Wim Dobbelaere (OnSemiconductor)
Speakers:

  • The Challenge of Functional Safety in AMS Design
    Vladimir Zivkovic, Art Schaldenbrand, Cadence
  • ISO 26262 Functional Safety Subsystem for Automotive SOCs
    Yervant Zorian, Synopsis
  • Measuring ISO 26262 Metrics and Fault Coverage Simultaneously for A/MS Circuits
    Stephen Sunter, Mentor, A Siemens Business

Plenary Evening Panel: Are we about to automate ourselves out of our jobs?

Room: Presidio Ballroom
Time: 16:30 – 18:00

Moderator: Stefano Di Carlo (Politecnico di Torino)
Panelists:

  • Siddharth Garg (NYU)
  • Yiorgos Makris (UT Dallas)
  • Niveditha Sundaram(Intel)
  • Rahim K Mohammed (Intel)

TPC Meeting

Room: Jeremiah O’Brien Room
Time: 18:30 – 20:30
by Invitation Only

April, 24th

Registration & Breakfast

Room: North Point Lounge
Time: 07:30 – 08:30

4A – BIST

Room: Banquet ABC
Time: 08:30 – 09:30
Moderator: Jennifer Dworak (Southern Methodist University)
  • An Inter-Layer Interconnect BIST Solution for Monolithic 3D ICs
    Abhishek KONERU, Krishnendu CHAKRABARTY (Duke University)
  • A Built-In Self-Test Technique for Transmitter-Only Systems
    Maryam SHAFIEE, Jennifer KITCHEN, Sule OZEV (Arizona State University)
  • Exploiting Built-In Delay Lines for Applying Launch-on-Capture At-Speed Testing on Self-Timed Circuits
    Omar AL-TERKAWI HASIB (Ecole polytechnique of Montreal), Daniel CREPEAU, Thomas AWAD (Octasic), Andrei DULIPOVICI (E. Tech. Sup. Montreal), Yvon SAVARIA (Ecole Polytechnique Montreal), Claude THIBEAULT (E. Tech. Sup. Montreal)

4B – Hot Topic: Bringing Cores Closer Together: The Wireless Revolution in On-Chip Communication

Room: CA Thayer
Time: 08:30 – 09:30
Organizer: Partha Pratim Pande (Washington State University)
Moderator: Sudeep Pasricha (Colorado State University)
  • Surfing on the Chip: Wired and Surface-Wave Integration for Network-on-Chip Architectures
    Presenter: Terrence Mak, University of Southampton
  • A Building Block 3D System with Inductive-Coupling Through Chip Interfaces
    Presenter: Hiroki Matsutani, Keio University
  • Designing Energy Efficient and Reliable Manycore Chip Enabled by Millimeter-Wave Wireless Links
    Presenter: Partha Pratim Pande, Washington State University

4C – IP Session: Fault Simulation for Functional Safety

Room: Presidio Ballroom
Time: 08:30 – 09:30
Organizer: Prashant Goteti (Intel)
Moderator: Sreejit Chakravarty (Intel)
Speakers:

  • Accelerating Fault Injection and Diagnostic Coverage for FuSa
    Animesh Mishra, Intel
  • Functional Random Testing on the ATE targeting CPU SoC for Automotive Grade Products
    John M .Van Gelder, Xilinx
  • Fault Simulation and Modeling for Analog Test
    Mayukh Bhattacharya, Synopsys

5A – Test Standards

Room: Banquet ABC
Time: 09:45 – 10:45
Moderator: Claude Thibeault (E. Tech. Sup. Montreal)
  • Broadcast-Based Minimization of the Overall Access Time for the IEEE 1687 Network
    Zhanwei ZHONG (Duke University), Guoliang LI, Qinfu YANG, Jun QIAN (Advanced Micro Devices), Krishnendu CHAKRABARTY (Duke University)
  • Efficient Parallel Testing: A Configurable and Scalable Broadcast Network Design Using IJTAG
    Saurabh GUPTA, Jennifer DWORAK (Southern Methodist University), Jae WU (Nvidia Graphics)
  • Securing IJTAG Against Data-Integrity Attacks
    Rana ELNAGGAR (Duke University), Ramesh KARRI (NYU), Krishnendu CHAKRABARTY (Duke University)

5B – Hot Topic: Overcoming Reliability and Energy-Efficiency Challenges with Silicon Photonics for Future Manycore Computing

Room: CA Thayer
Time: 09:45 – 10:45
Organizer: Sudeep Pasricha (Colorado State University)
Moderator: Partha Pratim Pande (Washington State University)
  • Exploring Power and Data Signaling Enhancements for Emerging Silicon Photonic Networks-on-Chip
    Presenter: Sudeep Pasricha, Colorado State University
  • Toward a Cross-Layer Synthesis Methodology for Wavelength-Routed Optical Networks-on-Chip
    Presenter: Davide Bertozzi, University of Ferrara
  • Thermal-Aware Design Methods in Optical Networks-on-Chip
    Presenter: Hui Li, Xidian University

5C – IP Session: Innovative Practices on Test in Japan

Room: Presidio Ballroom
Time: 09:45 – 10:45
Organizer: Kazumi Hatayama (Gunma University)
Moderator: Kazumi Hatayama (Gunma University)
Speakers:

  • Analysis and Evaluation Method of Complex Analog Filter
    Koji Asami, Advantest, Japan
  • A DFT based approach to functional safety for automotive MCU
    Jun Matsushima and Yoichi Maeda, Renesas Electronics, Japan

6A – ATPG

Room: Banquet ABC
Time: 11:00 – 12:00
Moderator: Alex Orailoglu (UCSD)
  • Efficient Generation of Parametric Test Vectors for AMS chips with an Interval Constraint Solver
    Felix NEUBAUER, Jan BURCHARD, Pascal RAIOLA (University of Freiburg), Jochen RIVOIR (Advantest), Bernd BECKER, Matthias SAUER (University of Freiburg)
  • Enhanced Hotspot Detection Through Synthetic Pattern Generation and Design of Experiments
    Gaurav RAJAVENDRA REDDY, Constantinos XANTHOPOULOS (University of Texas at Dallas), Yiorgos MAKRIS (UT Dallas)
  • Staggered ATPG with Capture-per-Cycle Observation Test Points
    Jerzy TYSZER (Poznan University of Technology), Yingdi LIU, Sudhakar REDDY (University of Iowa), Janusz RAJSKI (Mentor Graphics Corporation), Jedrzej SOLECKI (Mentor – A Siemens Business)

6B – Hot Topic: Intelligent Sensor Nodes

Room: CA Thayer
Time: 11:00 – 12:00
Organizer: Kanad Basu (NYU) & Shreyas Sen (Purdue University)
Moderator: Kanad Basu (NYU) & Shreyas Sen (Purdue University)
  • The Challenge of Large-Scale Connectivity: Design, Validation, and Debug
    Presenter: Sandip Ray, University of Florida
  • Hierarchical Checking and Adaptation Strategies for Robust Intelligent Autonomous Systems
    (Presenter: Abhijit Chatterjee, Georgia Institute of Technology
  • Solving the Drift Problem of Biological and Chemical Sensors in the Field
    Presenter: Sule Ozev and Jennifer Blain Christen, Arizona State University
  • Analog, Mixed-Signal and MEMS DFT and its Use for Intelligent Sensors
    Presenter: Salvador Mir, Université Grenoble Alpes, CNRS, TIMA

6C – IP Session: Silicon Photonics

Room: Presidio Ballroom
Time: 11:00 – 12:00
Organizer: Eugene Atwood (IBM)
Moderator: Eugene Atwood (IBM)
Speakers:

  • The status, needs and potential solutions related to testing photonic devices and products including those that Incorporate Photonic Integrated Circuits (PIC)
    Dick Otte, PROMEX
  • Challenges and Opportunities in Integrated CMOS/Photonics Test
    Roy Meade, Ayar Lab
  • Machine Learning Application For Silicon Photonics Transceiver Testing
    Woosung Kim, Intel Corporation

Lunch break

Room: North Point Lounge
Time: 12:00 – 13:10

Panel I – Solutions to Automotive Test Challenges: Are we there yet?

Room: Banquet ABC
Time: 13:10 – 14:10

Moderator: Federico Venini (Politecnico di Torino)
Panelists:

  • Davide Appello (ST)
  • Jon Colburn (Nvidia)
  • Gustavo Espinosa (Intel)
  • Nir Maor (Qualcomm)
  • Yervant Zorian (Synopsys)

Panel II – Challenges for Heterogeneous Integration: Learning from Past Experiences to Solve Problems of the Future

Room: CA Thayer
Time: 13:10 – 14:10

Moderator: Sule Ozev (ASU)
Panelists:

  • Jennifer Kitchen (ASU)
  • Krish Chakrabarty (Duke University)
  • Nui Chong (Xilinx)
  • Eugene Atwood (IBM)

Poster Session

Room: Presidio Ballroom
Time: 13:10 – 14:10
The full list of the Participants is available here (Doctoral Thesis Competition) and here (Ph.D. Forum participants).

Social Program

Time: 14:30 – 21:00

April, 25th

Registration & Breakfast

Room: North Point Lounge
Time: 07:30 – 08:30

7A – Reliability

Room: Banquet ABC
Time: 08:30 – 09:30
Moderator: Yiorgos Makris (UT Dallas)
  • Systematic b-Adjacent Symbol Error Correcting Reed-Solomon Codes with Parallel Decoding
    Abhishek DAS, Nur TOUBA (University of Texas at Austin)
  • Circuit-Level Reliability Simulator for Front-End-of-Line and Middle-of-Line Time-Dependent Dielectric Breakdown in FinFET Technology
    Kexin YANG (Georgia Institute of Technology), Taizhi LIU (Georgia Tech), Rui ZHANG, Linda MILOR (Georgia Institute of Technology)
  • On-Line Monitoring and Error Correction in Sensor Interface Circuits Using Digital Calibration Techniques
    Sascha HEINSSEN, Theodor HILLEBRAND, Maike TADDIKEN, Steffen PAUL, Dagmar PETERS-DROLSHAGEN (University of Bremen)

7B – Hot Topic: BIST/Calibration of A/MS devices

Room: CA Thayer
Time: 08:30 – 09:30
Organizer: Peter Sarson (Dialog Semiconductor)
Moderator: Peter Sarson (Dialog Semiconductor)
  • Trimming: The Challenge for Yield and Test Cost
    Presenter: Hans Martin von Staudt, Dialog Semicondutor
  • High accuracy trim, calibration and testing of integrated on-chip op-amps
    Presenter: James Izon, Texas Instruments
  • Dynamic Testing and Trimming for Embedded DC-DC Converters
    Presenter: Sule Ozev, Arizona State University

7C – IP Session: Machine Learning for Emerging Applications

Room: Presidio Ballroom
Time: 08:30 – 09:30
Organizer: Yu Huang (Mentor, A Siemens Business)
Moderator: Yu Huang (Mentor, A Siemens Business)
Speakers:

  • Overcoming the Challenges of Hotspot Detection using Deep Learning
    Kareem Madkour, Mentor, A Siemens Business
  • Data-Driven Health Monitoring Solution for Network Devices
    Zhaobo Zhang, Huawei Technologies Co. Ltd
  • Data Collection of a Trojan Insertion Hardware Emulator for Machine Learning
    Alfred L. Crouch, Peter L. Levin, and Eve Hunter, Amida Technology Solutions, Inc.

8A – Machine Learning in Test

Room: Banquet ABC
Time: 09:50 – 10:50
Moderator: Haralampos Stratigopoulos (Sorbonne University, CNRS, LIP6)
  • IC Layout Weak Point Effectiveness Evaluation based on Statistical Methods
    Fang LIN (San Diego State University), Ali AHMADI, Kannan SEKAR (GLOBALFOUNDRIES), Pan YAN (Global Foundries), Ke HUANG (San Diego State University)
  • Analyzing and Mitigating the Impact of Permanent Faults on a Systolic Array Based Neural Network Accelerator
    Jeff ZHANG, Tianyu GU, Kanad BASU, Siddharth GARG (New York University)
  • IR Drop Prediction of ECO-Revised Circuits Using Machine Learning
    Shih-Yao LIN, Yen-Chun FANG, Yu-Ching LI, Yu-Cheng LIU, Chien-Mo LI, Tsung-Shan YANG, Shang-Chien LING (National Taiwan University), Eric Jia-Wei Fang (MediaTek Inc.)

8B – Hot Topic: Machine Learning for Test and Diagnosis

Room: CA Thayer
Time: 09:50 – 10:50
Organizer: Yu Huang (Mentor, A Siemens Business)
Moderator: Arani Sinha (Intel Corporation)
  • Data-Driven Resiliency Solutions for Boards and Systems
    Presenter: Krishnendu Chakrabarty, Duke University
  • Machine Learning For Feature-Based Analytics in Some Test Applications
    Presenter: Li-C. Wang, UCSB
  • Supervised Techniques for Volume Diagnosis
    Presenter: Gaurav Veda, Mentor, A Siemens Business

8C – IP Session: Challenges, Opportunities, and Solutions to Hardware Security

Room: Presidio Ballroom
Time: 09:50 – 10:50
Organizer: Huawei Li (CAS)
Moderator: Huawei Li (CAS)
Speakers:

  • Is EDA Industry Ready for Design for Security and Security Validation Challenges?
    Sohrab Aftabjahani, Intel
  • Enabling Full SoC Hardware/Software Security Verification
    Jason Oberg, Tortuga Logic
  • Finding Opportunities to Apply Hardware Security
    Michael Chen, Mentor, A Siemens Business

9A – Test Data Analysis

Room: Banquet ABC
Time: 11:10 – 12:10
Moderator: Janusz Rajski (Mentor Graphics Corporation)
  • Fast Fault Coverage Estimation of Sequential Tests Using Entropy Measurements
    Sarmad TANWIR, Michael HSIAO (Virginia Tech)
  • Real-Time Monitoring of Test Fallout Data to Quickly Identify Tester and Yield Issues in a Multi-Site Environment
    Qutaiba KHASAWNEH (Oncor), Jennifer DWORAK, Ping GUI, Benjamin WILLIAMS, Alan ELLIOTT (SMU), Anand MUTHAIAH (Tessolve)
  • Online Information Utility Assessment for Per-Device Adaptive Test Flow
    Yanjun LI (University of Electronic Science and Technology of China), Ender YILMAZ (NXP Semiconductors), Pete SARSON (ams AG), Sule OZEV (Arizona State University)

9B – New Topic: Quantum Systems: Next Challenges in Design,Test, Integration

Room: CA Thayer
Time: 11:10 – 12:40
Organizers: Bozena Kaminska (Simon Fraser University) & Bernard Courtois (BC Consulting)
Moderators: Bozena Kaminska (Simon Fraser University) & Bernard Courtois (BC Consulting)
  • Challenges and opportunities of Si-based Quantum bits integration
    Presenter: Carlo Reita, CEA-LETI
  • Challenges in scaling up silicon-based quantum processors
    Presenter: Jonathan Baugh, University of Waterloo
  • Building a supercomputing quantum processor at scale
    Presenter: Gabriel Poulin-Lamarre, D-Wave Systems

9C – TTTC ‘s E. J. McCluskey Doctoral Thesis Award

Room: Presidio Ballroom
Time: 11:10 – 12:40
Organizers: Naghmeh Karimi (University of Maryland Baltimore County)

The full list of the VTS18 Semifinalists is available here.

Lunch break

Room: North Point Lounge
Time: 12:40 – 14:00

10A – Reliability, Security, Diagnosis

Room: Banquet ABC
Time: 14:00 – 15:00
Moderator: Tapan Chakraborty (Qualcomm Inc.)
  • NOIDA: Noise-resistant Intra-cell diagnosis
    Soumya MITTAL, Ronald BLANTON (Carnegie Mellon University)
  • Multi-faceted Microarchitecture Level Reliability Characterization for NVIDIA and AMD GPUs
    Alessandro VALLERO (Politecnico di Torino), Sotiris TSELONIS, Dimitris GIZOPOULOS (University of Athens), Stefano DI CARLO (Politecnico di Torino)
  • RF Circuit Authentication for Detection of Process Trojans
    Fatih KARABACAK (Arizona State University), Richard WELKER (Alphacore Inc.), Matthew CASTO (Air Force Research Lab, Wright-Patterson Air Force Base), Kitchen JENNIFER, Sule OZEV (Arizona State University)

10B – Hot Topic: Machine Learning and Big Data in Test

Room: CA Thayer
Time: 14:00 – 15:00
Organizer: Marc Hutner (Teradyne)
Moderator: Marc Hutner (Teradyne)
  • Machine Learning in Semiconductor Test: Can Deep Learning Save The Day?
    Presenter: Yiorgos Makris, UT Dallas
  • Small Signals Extraction in Semiconductor Test & Manufacturing: Role of Machine Learning
    Presenter: Amit Nahar, Texas Instruments
  • Adaptive Test: Machine Learning in Real Time on Big Data
    Presenter: Haralampos-G. Stratigopoulos, Sorbonne University, CNRS, LIP6

10C – IP Session: Design & Test fo Flexible Hybrid Electronics

Room: Presidio Ballroom
Time: 14:00 – 15:00
Organizer: Jim Huang (Hewlett Packard Labs)
Moderator: Mango Chia-Tso Chao (NCTU)
Speakers:

  • Process Design Kit (PDK) for Design and Test Challenges of Flexible Hybrid Electronics
    Jim Huang, HPE
  • Considerations for Design and Test of Flexible Hybrid Electronic Systems
    Jason Marsh, NextFlex
  • Design and Test Considerations for Flexible Hybrid Electronics Fabricated with High-Performance COTS ICs using RTI CircuitFilmTM Technology
    Scott H. Goodwin, Micross Components

10D – Town-Hall Meeting for NSF Student Program Participants

Room: TBA
Time: 14:00 – 15:00
Organizer: Naghmeh Karimi (University of Maryland Baltimore County)

The full list of the Participants is available here.