Room: Florentine III
Organizer: Bill Eklow, CISCO Systems, Inc
Moderator: Bill Eklow, CISCO Systems, Inc

• Board-level at-speed test challenges and solutions
  Artur Jutman (Testonica Labs, E)
• Standards: Can they co-exist for System Level Test?
  Michele Portolan (Grenoble-Alpes U., TIMA Laboratory, FR)

  Abstract: The world of test-related standards is living a big turmoil in recent times: the ever-growing complexity of chips required significant evolution in traditional approaches. This, coupled with the issue of Test Point Erosion, led to the definition of new standards for embedded testing, such as IEEE 1500 and IEEE 1687, the redefinition of classic JTAG into 1149.1-2013 or the new horizons opened by 3D chips and explored by activities like the IEEE P1838. Each of these standards addresses its own problem space, but a final system will most probably be composed of individual elements incorporating one or more of these often competing solutions. Is it really possible to efficiently test such an heterogeneous system?
  

• Data Driven, In-Circuit Test Optimization
  Brad Waggle (Cisco Systems, Inc., USA)