Room: Florentine III
Organizer: Peter Sarson, ams AG
Moderator: Prashant Goteti, Intel

• Quality Challenges in Mixed Signal Automotive Electronics
  Wim Dobbelaere, Ronny Vanhooren, (On Semi, Belgium), Peter Maxwell (On Semiconductor, USA), Anthony Coyette, Baris Esen, Georges Gielen (KU Leuven, Belgium)

  Abstract: Automotive Semiconductor Manufacturers strive to produce mixed signal integrated circuits with an extremely low defect test escape rate and a negligible early-life failure rate. This paper explains the four major gaps that keep us from achieving this goal today and lays out a path towards future solutions. The first gap is that the analog fault coverage of a mixed signal IC is unknown, which drives the development of novel automation tools. The second gap is that current mixed signal design practices lead to “hidden defects”, which is addressed using improved Design-For-Test methods. The third gap is the absence of a structured ATE test method which causes long test times, long development times and quality problems. As a result novel defect-oriented methods are investigated to replace the traditional performance-based analog testing. The fourth gap is that a failing chip can stop a vehicle pointing towards a need for better reliability test coverage. This paper highlights how the automotive electronics industry and academia are addressing these issues.

• 1687 Analog Test Bus Concept
  Jeff Rearick (AMD, US)

  Abstract: We will present on how a proposed standardised analog test bus can be used for the testing of automotive products. We will show how the bus can be used to connect to parts of a device that normally wouldn’t be connected so that extra test coverage can be attained.

• Achieving automotive test quality with lowest cost – BIST Methods for Analog modules
  Nirav Ginwala, Ibukun Olumuyiwa, and Niraj Sheth (EDAS, TI, USA)

  Abstract: Microcontroller products developed for automotive and safety-related target markets have extremely high quality requirements, exceeded only by military products and typically in the range of zero to single-digit defective parts per million. With ever-increasing complexity and higher levels of integration, including mixed-signal components such as ADCs, voltage regulators, phase-locked loops and embedded memories, developing test solutions that meet these quality requirements becomes challenging and often adds significantly to test cost and loss of efficiency. Built-In Self-Test methods such as logic BIST and memory BIST are widely used to achieve required coverage of digital circuits and memory data arrays. In testing integrated analog components, unique strategies can be employed to solve test quality challenges while maximizing efficiency and minimizing cost. We discuss test techniques achieving internalized analog trim, measuring the frequency response of phase-locked loops and other oscillators, and maximizing I/O functional test coverage with a minimum pin count, as examples of low-cost, high efficiency solutions we have developed in testing our mixed-signal IPs.