11A – Soc Testing

Room: Florentine I
Moderator: Naghmeh Karimi (Rutgers U.)

  • Flexible Scan Interface Architecture for Complex SoCs
    Milind SONAWANE (NVIDIA), Sailendra CHADALAVADA, Shantanu SARANGI, Amit SANGHANI, Mahmut YILMAZ, Pavan Kumar DATLA JAGANNADHA (Nvidia)
  • Optimization of the IEEE 1687 Access Network for Hybrid Access Schedules
    Srinivasa Shashank NUTHAKKI (IIT Kharagpur), RAJIT KARMAKAR (INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR), Santanu CHATTOPADHYAY (IIT Kharagpur), Krishnendu CHAKRABARTY (Duke University)
  • Test Method and Scheme for Low-Power Validation in Modern SOC Integrated Circuits
    Bonita BHASKARAN (NVIDIA Corp.), Amit SANGHANI (Nvidia), Kaushik NARAYANUN (NVIDIA Corp.), Ayub ABDOLLAHIAN (Nvidia), Amit LAKNAUR (NVIDIA Corp.)