 |
 |
 |
GENERAL INFO
THE SYMPOSIUM
PRACTICAL INFO
PROGRAM
SUBMISSIONS
|
 |
|
|
 |
Tutorials |
 |
|
|
VLSI Test Symposium 2008 includes two excellent TTEP 2008 tutorials on high interest
test technology topics. The two tutorials qualify for IEEE TTTC certification. One tutorial will be presented on Sunday,
April 27th and one on Thursday, May 1st. Each tutorial requires a separate fee and registration
(see General Information).
|
|
|
|
Tutorial 1: Sunday, April 27th, 8:30am-4:30pm |
|
|
|
7:30 - 8:30 am Tutorial Registration, Coffee Service
8:30 am - 4:30 pm Soft Errors: Technology Trends, System Effects, Protection Techniques and Case Studies
PRESENTERS: Subhasish Mitra (Stanford University), Pia Sanda (IBM), Norbert Seifert (Intel)
AUDIENCE: Researchers and practitioners interested in architecture, modeling, design, CAD, test and reliability
DESCRIPTION:
Radiation-induced soft errors are getting worse in digital systems manufactured in advanced technologies. Stringent data
integrity and availability requirements of enterprise computing and networking applications demand special attention to soft
errors in sequential elements and combinational logic. This tutorial discusses the impact of technology scaling on soft error
rates, circuit-level modeling of soft errors, architectural impact of soft errors, challenges associated with evaluation of
run-time behaviors of systems in the presence of soft errors, actual data on system behaviors in the presence of soft errors,
metrics for quantifying soft error vulnerabilities, design of architectures with Built-in-Soft-Error-Resilience techniques,
and actual case studies.
|
|
|
|
Tutorial 2: Thursday, May 1st, 8:30am-4:30pm |
|
|
|
7:30 - 8:30 am Tutorial Registration, Coffee Service
8:30 am - 4:30 pm Practices in Analog, Mixed-signal and RF Testing
PRESENTERS: Salem Abdennadher (Intel), Saghir Shaikh (Cadence)
AUDIENCE: This tutorial is most suitable for design, test and DFT engineers involved in actual implementation of
mixed-signal, analog, RF and wireless devices and systems. The architects and engineering managers would also greatly
benefit from this tutorial.
DESCRIPTION:
The objective of this tutorial is to present existing industry ATE solutions and alternatives to testing of mixed-signal
and RF SoCs. These techniques greatly rely upon DFT and BIST structures. The tutorial presents the basic concepts in analog
and RF measurements (eye diagram, jitter, gain, power compression, harmonics, noise figure, phase noise, BER, etc.). Several
industrial examples of production testing of mixed-signal and RF devices, such as, SERDES transceivers, PHYs, HSIO, and RF
transceivers are also presented. The block-DFT solutions are presented for PLLs, CDR, equalizers, filters, mixers, AGC, LNAs,
DACs and ADCs. The testing of high speed IO interfaces, such as, PCIe, and SATA, etc, and the new design trends in RF systems
such as MIMO and SiP based systems and their testability are also presented in this tutorial.
|
|
|
|
|
|
|
 |
|
 HOTEL DEADLINE
Hotel deadline extended to April 8. Due to the popularity of VTS2008, the on-line reservation system may not be able to
reserve rooms at VTS discounted rate for certain dates during your VTS stay.
Please call +1-800-542-6096 referencing IEEE (VLSI Test Symposium) to make your reservation.
NEWSLETTER
Here you can find the last VTS newsletter.
TECHNICAL PROGRAM
The technical program (including abstracts of Special and IP sessions) is now available here.
Read more about new and hot topic sessions...
SOCIAL EVENT
Bring your passport!!.
Read more...
DEADLINES
Abstract: Oct. 29th '07
Submission: Nov. 5th '07
Notification: Dec. 21st '07
IP Tracks: Dec. 31st '07
Special Ses.: Dec. 31st '07
Thesis Aw.: Mar. 7th, 08
Res. Poster: Mar. 7th, 08
Hotel Disc.: Apr. 7th, 08
Early Reg.: Apr. 11th, 08
LOCATION
VTS will take place from Apr 27th to May 1st, 2008, in San Diego, California, USA More...
Graduate Student Activities
Ph.D. students graduating in 2008 are invited to participate to the Doctoral Thesis Award Contest.
All other graduate students (Ph.D. or M.S.) working on a test-related thesis are invited to participate
to the Thesis Research Poster Session.
|
|
 |
|
|
|
 |
|
|
CONTACTS & FEEDBACK
For any questions you can contact the
VTS Office,
the General Chair or the
Program Chairs.
Moreover, The VTS Organizing Committee is interested in providing a rich
historical view of VTS. Please send information you believe to be relevant
to the historian.
For questions related to this website, please contact the
Webmaster
|
|
|
|
HOME 
CONTACTS 
