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GENERAL INFO
THE SYMPOSIUM
PRACTICAL INFO
PROGRAM
SUBMISSIONS
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Organizing Committee |
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General Chair
A. Orailoglu - UC San Diego
Program Chair
P. Maxwell - Micron
C. Metra - U Bologna
Past Chair
P. Prinetto - Politecnico di Torino
Vice-General Co-Chairs
S. M. Reddy - U Iowa
H.-J. Wunderlich - U Stuttgart
Vice-Program Chair
M. Renovell - LIRMM
New Topics
B. Courtois - TIMA
Special Sessions
L. Anghel - TIMA
C.P. Ravikumar - Texas Instr
Innovative Practices Track
K. Hatayama - STARC
S. Mitra - Stanford U
Registration
C. Thibeault - E Tech Sup Montreal
Publicity
| Chair: | C.H. Chiang - Alcatel-Lucent |
| Members: | Ismet Bayraktaroglu - Sun Microsystems
Stefano Di Carlo - Politecnico di Torino
Giorgio DI Natale - LIRMM
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Publications
S. Ravi - Texas Instr
Audio/Visual
S. Hellebrand - U Paderborn
Finance
M. Abadir - Freescale
Local Arrangements
I. Harris - UC Irvine
Latin America Liaison
L. Carro - UFRGS
North America Liaison
R. Kapur - Synopsys
Middle East & Africa Liaison
R. Makki - UAE U
Asia & Pacific Liaison
Y. Sato - Hitachi
Eastern Europe Liaison
R. Ubar - Tallin U
Western Europe Liaison
Z. Peng - Linkoping U
Ex-Officio
Y. Zorian - Virage Logic
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Program Committee |
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Methods
J. A. Abraham - UT Austin
V. D. Agrawal - Auburn U
B. Becker - U Freiburg
B. Cory - NVIDIA
P. Girard - LIRMM
D. Gizopoulos - U Piraeus
S. Gupta - USC
I. Hartanto - Xilinx
B. Kaminska - Pultronics
H. Konuk - Broadcom
C. Landrault - LIRMM
X. Li - Chinese Academy of Sciences
F. Lombardi - Northeastern U
E.J. Marinissen - NXP
E.J. McCluskey - Stanford U
L. Milor - Georgia Tech
S. Mourad - Santa Clara U
Z. Navabi - Worcester Polytechnic
S. Ozev - Duke U
A. Raghunathan - NEC
J. Rajski - Mentor Graphics
J. Segura - U Illes Balears
S. Shoukourian - Virage Logic
M. Soma - U Washington
S. Sunter - LogicVision
J. Tyszer - Poznan U
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Applications
D. Appello - STMicroelectronics
K. Arabi - PMC Sierra
C.J. Clark - Intellitech
R. Galivanche - Intel
A. Khoche - Verigy
Y. Makris - Yale U
P. Muhmenthaler - Infineon
J. Plusquellic - UMBC
C.W. Wu - Nat Tsing Hua U
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Steering Committee |
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J. Figueras - U Pol Catalunya
A. Ivanov - UBC
M. Nicolaidis - TIMA
P. Prinetto - Polit di Torino
A. Singh - Auburn U
P. Varma - Blue Pearl
Y. Zorian - Virage Logic
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 HOTEL DEADLINE
Hotel deadline extended to April 8. Due to the popularity of VTS2008, the on-line reservation system may not be able to
reserve rooms at VTS discounted rate for certain dates during your VTS stay.
Please call +1-800-542-6096 referencing IEEE (VLSI Test Symposium) to make your reservation.
NEWSLETTER
Here you can find the last VTS newsletter.
TECHNICAL PROGRAM
The technical program (including abstracts of Special and IP sessions) is now available here.
Read more about new and hot topic sessions...
SOCIAL EVENT
Bring your passport!!.
Read more...
DEADLINES
Abstract: Oct. 29th '07
Submission: Nov. 5th '07
Notification: Dec. 21st '07
IP Tracks: Dec. 31st '07
Special Ses.: Dec. 31st '07
Thesis Aw.: Mar. 7th, 08
Res. Poster: Mar. 7th, 08
Hotel Disc.: Apr. 7th, 08
Early Reg.: Apr. 11th, 08
LOCATION
VTS will take place from Apr 27th to May 1st, 2008, in San Diego, California, USA More...
Graduate Student Activities
Ph.D. students graduating in 2008 are invited to participate to the Doctoral Thesis Award Contest.
All other graduate students (Ph.D. or M.S.) working on a test-related thesis are invited to participate
to the Thesis Research Poster Session.
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CONTACTS & FEEDBACK
For any questions you can contact the
VTS Office,
the General Chair or the
Program Chairs.
Moreover, The VTS Organizing Committee is interested in providing a rich
historical view of VTS. Please send information you believe to be relevant
to the historian.
For questions related to this website, please contact the
Webmaster
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