VTS 2020 Best Paper Award
“EFFECTIVE DESIGN OF LAYOUT-FRIENDLY EDT DECOMPRESSOR”
Yu HUANG, Janusz RAJSKI, Mark KASSAB, Nilanjan MUKHERJEE, Jeff MAYER
Mentor Graphics, A Siemens Business
TTTC’s E. J. McCluskey Best Doctoral Thesis 2021 VT Semifinals winner.
VTS 2021 General Chairs are happy to announce that based on the evaluation of the jury, the final ranking of the TTTC’s E. J. McCluskey Doctoral Thesis Contest semifinals is:
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- 1st classified: Mengyun Liu (Duke University)
- 2nd classified: Huanyu Wang (University of Florida)
- 3rd classified ex aequo: Rana Elnaggar (Duke University) and Andrew Stern (University of Florida)
The Jury was composed of:
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- Haralampos Stratigopoulos, Sorbonne U., France
- Stefano Di Carlo, Polito, Italy
- Vivek Chickermane, Cadence
- Sohrab Aftabjahani, Intel
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Congratulations to Mengyun for winning the competition and thanks to all students and to the juries for the participation to the contest.
Finally, we thank Ujjwal Guin (Auburn University) for organizing and coordinating the contest.
Some photos of the online conference closing session
The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in test, validation, yield, reliability and security of microelectronic circuits and systems.
The 2021 edition of VTS will be an online virtual interactive live event.
The symposium will take place online as an interactive virtual program on April 26-28 7:00-10:15AM PT (16:00-19:15 CET).
The program includes keynotes, scientific paper presentations, short industrial application paper presentations, special sessions and Innovative Practices sessions.
Given the unique opportunity of reaching the worldwide test community through a virtual event registration rate for authors and attendees will be a fraction of our registration rate for VTS’20.
News for authors: Starting from 2021, VTS review process is DOUBLE BLIND with REBUTTAL, for both scientific papers and industrial application short papers. The references do not count towards the page limit.
You are invited to participate and submit your contributions to VTS’21. The areas of interest include (but are not limited to) the following topics:
VTS Topics
- Analog, Mixed-Signal, RF Test
- ATPG & Compression
- Silicon Debug
- Automotive Test & Safety
- Built-In Self-Test (BIST)
- Defect & Current Based Test
- Defect & Fault Tolerance
- Delay & Performance Test
- Design for Testability, Yield or Reliability
- Pre-silicon Design Verification & Validation
- Post-silicon Validation
- Embedded System & Board Test
- Embedded Test Methods
- Emerging Technologies Test and Reliability
- FPGA Test
- Fault Modeling and Simulation
- Hardware Security
- Low-Power IC Test
- Machine Learning in Test,Yield and Reliability
- Microsystems/MEMS/Sensors Test
- Memory Test and Repair
- On-Line Test & Error Correction
- Power & Thermal Issues in Test
- System-on-Chip (SOC) Test
- Test & Reliability of Biomedical Devices
- Test & Reliability of High-Speed I/O
- Test & Reliability of Machine Learning Systems
- Test Quality & Reliability
- Test Standards & Economics
- Test Resource Partitioning
- Transient & Soft Errors
- 2.5D, 3D & SiP Test
- Yield Optimization
New Hot Topics
- Test, Reliability & Security of AI and Neuromorphic Devices
- Machine Learning for Test
- Test & Reliability of Machine Learning Systems
- Test, Reliability & Security in Quantum Computing
General Chairs
Program Chairs
