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3rd PhD Award
The aim of the Third TTTC Doctoral Thesis Award is to promote and strengthen the interaction between doctoral students who are about to graduate and the industrial community.
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TTEP
TTTC Test Technology Educational Program (TTEP) tutorials on emerging test technology topics are also offered.

Program at a glance

2007, May 7th

11:00-12:00   Sessions 1

Session 1A - RF Test I

Session 1B - Delay Test Quality

IP Session 1C -  Design in presence of variations: characterization, monitoring, and response

13:20-14:20    Sessions 2

Session 2A - Memory Test

Session 2B - Test Compression

IP Session 2C - Small Delay Test in Practice

14:40-15:40   Sessions 3

Session 3A - Going after Defects

Session 3B - Online Test

IP Session 3C - System Test and NTFs

16:00-17:00   Sessions 4

Session 4A - Diagnosis I

Session 4B - ATPG for Delay Faults

IP Session 4C - High-Speed Test

20:00-21:30   Sessions 5

Session 5A:  Embedded Tutorial - Statistical and Data Mining Methods for Test-Based Yield Learning

Session 5B: Panel - Conversations with Test Experts



2007, May 8th

08:30-09:30   Sessions 6

Session 6A - Advances in Test

Session 6B - Diagnosis II

IP Session 6C - Testing Alone Isn’t Enough: Reliability Challenges in Scaled CMOS

09:50-10:50   Sessions 7

Session 7A - Failure Estimation

Session 7B - Fault Prediction & Evaluation

Session 7C - Open and Highly Extendable Yield Diagnostics Solutions

11:10-12:10   Sessions 8

Session 8A - Analog Test

Session 8B - High Level Test Techniques

IP Session 8C - Impact of New Memory Failure Modes

13:45-15:15   Sessions 9

Special Session 9A:  Hot Topic - Fault Tolerant Nanoscale Architectures - the Challenges and Emerging Solutions

Session 9B - TTTC 2007 Best Doctoral Thesis Award

Special Session 9C:  Hot Topic - Making Analog & Mixed Signal Testing As Robust As Digital



2007, May 9th

09:00-10:00   Sessions 10

Session 10A - Memory Repair

Session 10B - SOC Test

10:20-11:20   Sessions 11

Session 11A - RF Test II

Session 11B - Design for Test

IP Session 11C - Collaborative DFT Practices Needed for Low-cost Testing

11:40-12:40   Sessions 12

Session 12A - Testing Large Chips

Session 12B - Ensuring Secure Chips

IP Session 12C:  Board and System Level Memory Cluster Test Problems and Proposed Solutions

14:00-15:30   Sessions 13

Special Session 13A:  New Topic - From asynchronous electronics to asynchronous molecular nanoelectronics

Session 13B: Hot Topic - Testing in the Presence of NOCs

Special Session 13C: Panel - RF Yield : Is it a problem?

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