Registration desk will be open
- Mon 7:30AM-3PM
- Tues 7:30AM-2PM
- Wednesday 7:30AM-12PM
VTS 2025 Final Program
10:30
Challenge Selection for Salvaging Faulty APUFs
Speaker: TBD
Authors: Yeqi WEI,
Wenjing RAO (University of Illinois Chicago),
Natasha DEVROYE (University of Illinois Chicago)
SALTY: Explainable Artificial Intelligence Guided Structural Analysis for Hardware Trojan Detection
Speaker: TBD
Authors: Tanzim MAHFUZ (University of Maine), Pravin GAIKWAD (University of Florida), Tasneem SUHA (University of Maine), Swarup BHUNIA (University of Florida), Prabuddha CHAKRABORTY (University of Maine)
SCAPEgoat: Side Channel Analysis Library
Speaker: TBD
Authors: Dev MEHTA, Trey MARCANTONIO (Worcester Polytechnic Institute), Mohammad HASHEMI, Samuel KARKACHE, Dillibabu SHANMUGAM, Patrick SCHAUMONT (Worcester Polytechnic Institute (WPI)), Fatemeh GANJI (Worcester Polytechnic Institute)
Special Session 1: Test/Metrology/Security for Packaging (Room: TBD)
From Design to Inspection: Can Inspection-aware Design Enhance Reliability in Advanced Packaging?
Speaker: Navid Asadi (UF)
Test Complexity in the Semiconductor Landscape
Speaker: Suma Ayyagari (Intel)
Reliability Challenges for Advanced Packaging
Speaker: Christopher Bailey (ASU)
IP Session 1: AI for Test (Room: TBD)
AI Driven Test Space Optimization
Speaker: Sri Ganta, Synopsys
Towards Test Quality and Productivity Improvement with AI
Speaker: Bonita Bhaskaran, NVIDIA
Emerging Trends in AI for Semiconductor Testing: From Automation to Intelligence
Speaker: Vijayaprabhuvel Rajavel, HCL America Inc.
11:30
ML-based Adaptive Wafer Sort to Preserve Diagnostic Information (ROOM:TBD)
Speaker: TBD
Authors: Yun-Sheng LIU, Min-Hsin LIU (National Taiwan University), Chien-Mo LI (NTU)
Multi-core Vmin and Worst-core Vmin Prediction using SOMAC
Speaker: TBD
Authors: Jeng-Yu LIAO, LiYang WANG (National Taiwan University), Chien-Mo LI (NTU), Harry CHEN (MediaTek Inc.)
Reliable Board Level Degradation Prediction with Monotonic Segmented Regression under Noisy Measurement
Speaker: TBD
Authors: Yuxuan YIN (University of California, Santa Barbara), Rebecca CHEN, Varun THUKRAL, Chen HE (NXP Semiconductor), Peng LI (University of California, Santa Barbara)
LLM- Driven Functional Test Generation for Silent Data Corruption (SDC)
Speaker: Farshad FIROUZI (ASU)
Understanding Path Delay Failures from Process Variations for Enhanced Detection and Mitigation
Speaker: Adit SINGH (Auburn)
Understanding the Impact of Transient Hardware Failures in Quntized Neural Networks
Speaker: Yanjing Li
IP Session 2: Hardware Security and Test for AMS Circuits (Room:TBD)
A few key aspects of analog defect simulation
Speaker: Mayukh Bhattacharya, Synopsys
Connecting the dots from mathematical to physical security
Speaker: Archisman Ghosh, Ixana
Machine learning assisted testing of AMS circuits
Speaker: Suhasini Komarraju, Intel
14:00
15:00
Special Session 3: Large Language Models and Systems: Design, Security, and Acceleration (ROOM:TBD)
LLM-Aided Design
Speaker: Farshad Firouzi
LLM for Analog Circuit Design
Speaker: David Z. Pan
Logic-AAA: Leveraging LLMs for Physical Side-Channel Modeling and Analysis
Speaker: Nader Sehatbakhsh
Electronic-Photonic Heterogeneous Computing Systems for Generative AI Acceleration
Speaker: Jiaqi Gu
Regular Session 3: Name:TBD (Room:TBD)
Chip Aging and Double Transition Faults
Speaker: TBD
Authors: Irith POMERANZ (Purdue University)
Novel Gate Leakage Current Integration-Based Dielectric Breakdown Monitor in a 12nm FinFET Process
Speaker: TBD
Authors: Mateo RENDON, Ian HILL, Andre IVANOV (University of British Columbia)
Designing Radiation-Hardened D Flip-Flop with Reduced Latency and Area Using Filtering Buffer
Speaker: TBD
Authors: Nelson M.-C. WU, Lowry P.-T. WANG, Chia-Wei LIANG, Charles H.-P. WEN, Herming CHIUEH (National Yang Ming Chiao Tung University)
Special Session 4: Trustworthy Hardware-AI at the Cloud (Room:TBD)
SDC/SDE in hardware: Definition and Possible Origins
Speaker: Francesco Angione, Politecnico di Torino
SDC/SDE impact on AI training workload
Speaker: Harish Dattatraya Dixit, Meta
SDC/SDE impacts on AI inference workload
Speaker: Alberto Bosio, Ecole Centrale De Lyon
16:30
Regular Session 4: TBD (ROOM:TBD)
Fault modeling and Testing of ReRAM-based CAM Array
Speaker: TBD
Authors: Haneen G. HEZAYYIN (Karlsruhe Institute of Technology), Mahta MAYAHINIA (KIT university), Mehdi TAHOORI (Karlsruhe Institute of Technology)
Fault Severity Analysis for Analog Circuits Using Zoom Search and Hierarchical Fault Simulation
Speaker: TBD
Authors: Mehmet ONDER (Arizona State University), Lakshmanan BALASUBRAMANIAN (Texas Instruments (India) Pvt.), Rubin PAREKHJI (Texas Instruments (India)), Suriyaprakash NATARAJAN (Siemens EDA), Sule OZEV (Arizona State University)
MicroFI: Tensorflow Lite based Fault Injection Framework for Microcontrollers
Speaker: TBD
Authors:Leonardo ALEXANDRINO DE MELO, ALBERTO BOSIO (Lyon Institute of Nanotechnology), Rodrigo POSSAMAI BASTOS (TIMA Laboratory (CNRS) / Universit)
GLLaMoR: Graph-based Logic Locking by Large Language Models for Enhanced Robustness
Speaker: Ozgur Sinanoglu
LLM-Guided Functional Test Generation for COTS Hardware
Speaker: Swarup Bhunia
LLM-IFT: LLM-Powered Information Flow Tracking for Secure Hardware
Speaker: Kimia Azar (CSU)
Fine-Tuning Large Language Models for Hardware Vulnerability Detection in SoC Design
Speaker: Farimah Farahmandi
Regular Session 5: Name:TBD (ROOM:TBD)
Defect Analysis and Built-In-Self-Test for Chiplet Interconnects in Fan-out Wafer-Level Packaging
Speaker: TBD
Authors: Partho BHOUMIK, Chris BAILEY, Krishnendu CHAKRABARTY (Arizona State University)
High Accuracy, Cost-Effective Built-In Self-Test (BIST) Approach for High-Resolution Data Converters
Speaker: TBD
Authors: Emmanuel NTI DARKO, Saeid KARIMPOUR, Degang CHEN (Iowa State University)
Periodic Non-Destructive Memory BIST for Automotive Applications
Speaker: TBD
Authors: Wei ZOU (Siemens), Artur POGIEL, Albert AU (Siemens EDA)
10:00
Regular Session 6: NAME:TBD (ROOM:TBD)
Fine-Grained Steepening of the Fault Coverage Curve of a Pool of Functional Test Sequences
Speaker: TBD
Authors: Irith POMERANZ (Purdue University)
Test Methodology for Detecting Defect-Based Hold-Time Faults
Speaker: TBD
Authors: Cheng-Hsiang TSAI, Yu-Teng NIEN, Guan-You CHEN, Mango CHAO (National Yang Ming Chiao Tung University)
Timing-Verification Test Generation Targeting Small Delay Defects
Speaker: TBD
Authors: Jiezhong WU (Purdue University), Nilanjan MUKHERJEE (Siemens Digital Industries Software), Irith POMERANZ (Purdue University), Kun-Han TSAI, Janusz RAJSKI (Siemens Digital Industries Software)
Special Session 6: Heterogeneous Integration Roadmap Test Chapter and Test Challenges (ROOM:TBD)
Heterogeneous Integration Roadmap Test Chapter Overview
Speaker: Jeorge Hurtarte (Teradyne)
Challenges for High Performance Computing Advanced Packaging Products
Speaker: Janusz Rajski
Challenges for devices with Co-Packaged Optics
Speaker: Dave Armstrong
IP Session 3: Microelectronics Resilience and Reliability (ROOM:TBD)
Latency Estimation for Large Language Models on Mobile GPUs
Speaker: Chandramouli Amarnath, Google
Can AI transform test?
Speaker: Gaurav Veda, Siemens EDA
Al guided Security and Test of Analog Integrated circuits
Speaker: Jonti Talukdar, NVIDIA
11:00
Special Session 7: Using HLS4ML for Testable AI Hardware Designs (ROOM:TBD)
TBD
Speaker: Seda Ogrenci (Northwestern)
TBD
Speaker: Ahmet Enis Cetin (UIC)
TBD
Speaker: Trivedi, Amit (UIC)
Regular Session 7: TBD (ROOM:TBD)
APT: Optimal Tree for Diagnosis Simulation
Speaker: TBD
Authors: wu-tung CHENG (Siemens)
CHEF: CHaracterizing Elusive Logic Circuit Failures
Speaker: TBD
Authors: Ruben PURDY, Chris NIGH, Wei LI (Carnegie Mellon University), Shawn BLANTON (Carnegie Mellon Univ., Pittsburgh, USA)
DC Stimulus Electrical Calibration of MEMS Accelerometers
Speaker: TBD
Authors: Ishaan BASSI, Sule OZEV (Arizona State University)
Special Session 8: Test and reliability of THz IC design (ROOM:TBD)
Opportunities for Built-in Self-Test Within Emerging mm-Wave Phased Array and MIMO
Speaker: Negar Reiskarimian (MIT)
Modeling of Distortion Behavior of GaN-based HEMTs for High-Frequency IC Design
Speaker: Kexin Li (ASU)
Small-Signal and Large-Signal Measurement Techniques at Sub-THz Frequencies
Speaker:Aritra Banerjee (UIC)
14:15
Ph.D. Competition (ROOM: Pima)
- Cheng-Yun Hsieh - National Taiwan University
- Francesco Angione - Politecnico di Torino
- Jonti Talukdar - Arizona State University
- Abdullah Giray Yağlıkçı - ETH Zurich
- Soyed Tuhin Ahmed - Karlsruhe Institute of Technology
- Mohammad Ebrahimabadi - University of Maryland Baltimore County
- Ferhat Can Ataman - Arizona State University
15:45
Regular Session 8: Name: TBD (ROOM: TBD)
Garblet: Multi-party Computation for Protecting Chiplet-based Systems
Speaker: TBD
Authors: Mohammad HASHEMI (Worcester Polytechnic Institute (WPI)), Shahin TAJIK, Fatemeh GANJI (Worcester Polytechnic Institute)
Revisiting DRAM Read Disturbance: Identifying Inconsistencies Between Experimental Characterization with Device-Level Studies
Speaker: TBD
Authors: Haocong LUO, Ismail YUKSEL, Ataberk OLGUN, Abdullah Giray YAGLIKCI, Onur MUTLU (ETH Zurich)
Special Session 9: Novel Calibration Techniques for Mixed-Signal Integrated Circuits (ROOM:TBD)
Self-Calibrating Voltage Reference
Speaker: InHee Lee (U. Pittsburgh)
Machine Learning-Based Calibration Techniques for ADCs: An Overview
Speaker: Tuan Pham (SUNY)
Machine-learning based Calibration of Time-Interleaved ADC
Speaker: Sumukh Bhanushali (ASU)
Compute-in-Memory Mosaic: Orchestrating Tiny CIM Array Collaborations for Flexible and Scalable Deep Learning
Speaker: Amit Trivedi (U. Illinois at Chicago)
IP Session 4: Diagnosis and Debug (ROOM: TBD)
TBD
Speaker: Sankaran Menon, Intel
TBD
Speaker: Wu-Tung Cheng, Siemens EDA
TBD
Speaker: Saghir Shaikh, Intel
08:30
10:00
Regular Session 9: Name: TBD (ROOM: TBD)
Data-Efficient Prediction of Minimum Operating Voltage via Inter- and Intra-Wafer Variation Alignment
Speaker: TBD
Authors: Yuxuan YIN (University of California, Santa Barbara), Rebecca CHEN, Chen HE (NXP Semiconductor), Peng LI (University of California, Santa Barbara)
Enhancing Metrology to E-test Correlation Model Accuracy through Process Expertise Integration
Speaker: TBD
Authors:Ching-Yi CHANG, Matthew NIGH (UT Dallas), John CARULLI (GlobalFoundries), Yiorgos MAKRIS (UT Dallas)
Artificial Bee Colony Optimization to Accelerate High-Speed Serial I/O Tx Equalization
Speaker: TBD
Authors: Cesar SANCHEZ-MARTINEZ (Intel Corportation), Paulo LOPEZ-MEYER (Intel Corporation), Andres VIVEROS WACHER (intel)
A novel variant of Threshold Implementation with cost amortization
Speaker: Sylvain Guilley
Security verification in the context of high order hardware masking
Speaker: Cédric Tavernier (Hensoldt France)
Using digital sensors to detect high-order attacks targeting masking-protected devices
Speaker: Naghmeh Karimi
IP Session 5: IEEE P3405 Chiplet based test (ROOM: TBD)
TBD
Speaker: Sreejit Chakraborty
TBD
Speaker: Esteban Garita Rodriguez
TBD
Speaker: Anshuman Chandra
Analog and Mixed Signal DFX in 2.5D and 3D designs
Speaker: Pradipta Ghosh, Microsoft
11:00
Regular Session 10: NAME: TBD (ROOM:TBD)
CEDHDC: Lightweight Concurrent Error Detection for Reliable Hyperdimensional Computing
Speaker: TBD
Authors: Mahboobe SADEGHIPOURRUDSARI, vincent MEYERS (Karlsruher Institut für Technologie (KIT)), Mehdi TAHOORI (Karlsruhe Institute of Technology)
CLIP: A Structural Approach to Cut Points Matching for Logic Equivalence Checking
Speaker: TBD
Authors: Dinesh Reddy ANKIREDDY, Sudipta PARIA, Aritra DASGUPTA, SANDIP RAY, Swarup BHUNIA (University of Florida)
A Hierarchical Graph Based Intelligent Method for Test Point Insertion
Speaker: TBD
Authors: Zhiteng CHAO (ICT), Bin SUN, Hongqin LYU, Ge YU, Mingjun WANG (SKLP, ICT, CAS), Wenxing LI, Zizhen LIU (Institute of Computing Technology, Chinese Academy of Sciences), Jianan MU (SKLP, ICT, CAS), Shengwen LIANG, Jing YE (Institute of Computing Technology, Chinese Academy of Sciences), Xiaowei LI (Institute of Computing Technology, CAS), HUAWEI LI (Chinese Academy of Sciences)
Special Session 11: RF Test and Built-in Test (ROOM:TBD)
TBD
Speaker: Shobak
TBD
Speaker: Noah Rajbharti
TBD
Speaker: Bruce Green
IP Session 6: Use of LLMs in Test (ROOM:TBD)
TBD
Speaker: Abhijit Sathaye
13:30
Special Session 12: Security Verification (ROOM: TBD)
Symbolic Execution at Scale: Verifying Large Open-Source SoCs with Assertion and
Information Flow Analysis
Speaker: Cynthia Sturton
AI-guided Threat Modeling and Test Plan Generation for Hardware Security
Verification
Speaker: Farimah Farahmandi
Security Validation in Emerging SoC Designs: Scope, Challenges, and Practice
Speaker: Sandip Ray
Towards Autonomous Hardware Security Verification: Tools and Techniques for
Verifying Next Generation of Computing Devices
Speaker: Kanad Basu
IP Session 7: Industry RAS/SDC Innovative Practices: from Si IP to Mega Fleets (ROOM: TBD)
SoC Level innovations for RAS and SDC
Speaker: Intel presenter (Yogesh Varma)
GPU Systems RAS/SDC innovations
Speaker: Nvidia Presenter (John Holm)
Large scale fleet level RAS handling
Speaker: Microsoft (Drew Walton/ Rama Bhimanadhuni)
IP Session 8: Security Verification and Secure Testing Solutions (ROOM: TBD)
Secure Semiconductor Development Using Synopsys Security Verification Solutions
Speaker: Shylaja Sen (Synopsys)
Scalable Security Verification Enabled by AI
Speaker: Jermey S. Lee (Caspia)
Hardware Root of Trust for DFT
Speaker: Janusz Rajski (Siemens)
Emerging CAD solutions for side channel and fault injection analysisT
Speaker: Lan Lin (Ansys) (Siemens)