HOME     CONTACTS

GENERAL INFO Home Committees Call for Papers Awards How to get proceedings THE SYMPOSIUM Location Overview Registration Hotel PROGRAM Program at a glance Technical Program SUBMISSIONS Types of Submissions Author Information Authors/Reviewers Login Propose a Special Session Propose an IP Track Session VTS Staff Login TTEP TTTC Test Technology Educational Program (TTEP) tutorials on emerging test technology topics are also normally offered. Organizing Committee General Chair I. Pomeranz - Purdue U Program Chair P. Prinetto - Politecnico di Torino Vice-General Co-Chairs S. M. Reddy - U Iowa H.-J. Wunderlich - U Stuttgart Vice-Program Co-Chairs A. Orailoglu - UC San Diego J. Segura - U Illes Balears New Topics B. Courtois - TIMA Special Sessions P. Maxwell - Agilent C. Metra - U Bologna Innovative Practices Track S. Mitra - Intel Publications S. Ravi - NEC Publicity A. Raghunathan - NEC Audio/Visual D. Gizopoulos - U Piraeus Finance M. Renovell - LIRMM Local Arrangements B. West - Credence Past Chair S. Dey - Ortiva Networks Ex-Officio Y. Zorian - Virage Logic Program Committee M. Abadir - FreeScale J. A. Abraham - UT Austin V. D. Agrawal - Auburn U L. Anghel - TIMA D. Appello - STMicroelectronics B. Becker - U Freiburg A. Benso - Poli di Torino C.-H. Chiang - Lucent C.J. Clark - Intellitech D. Conti - IBM B. Cory - nVidia R. Galivanche - Intel P. Girard - LIRMM S. Gupta - USC I. Harris - UC Irvine K. Hatayama -Renesas S. Hellebrand - U Paderborn S. Kajihara - Kyushu Inst Tech B. Kaminska - Pultronics R. Kapur - Synopsys A. Khoche - Agilent H. Konuk - Broadcom C. Landrault - LIRMM R. Makki - UAE U H. Manhaeve - QStar E.J. McCluskey - Stanford U S. Mourad - Santa Clara U P. Muhmenthaler - Infineon J. Plusquellic - U Maryland J. Rajski - Mentor Graphics G. Roberts - McGill U R. Segers - Philips M. Soma - U Washington S. Sunter - LogicVision S. Tabatabaei - Virage Logic C. Thibeault - E Tech Sup Montreal J. Tyszer - Poznan U Technology R. Ubar - U Tallinn C. -W. Wu - Nat Tsing Hua U A. Yessayan - Virage Logic Steering Committee J. Figueras - U Poli Catalunya A. Ivanov - UBC M. Nicolaidis - iRoC R. Roy - Zenesys A. Singh - Auburn U P. Varma - Blue Pearl Y. Zorian - Virage Logic LOCATION VTS will take place from April 30th to May 4th, 2006 in Claremont Resort, Berkeley, California, USA More... DEADLINES Submission: Oct. 7th '05 Notification: Jan. 6th '06 Camera R.: Feb. 10th '06   CONTACTS & FEEDBACK For any questions you can contact the VTS Office, the General Chair or the Program Chair. Moreover, The VTS Organizing Committee is interested in providing a rich historical view of VTS. Please send information you believe to be relevant to the historian. For questions related to this website, please contact the Webmaster

Home    |    The Symposium    |    Program    |    Past Events    |    Authors/Reviewers For questions related to this website, please contact the Webmaster